(1) Field of the Invention
The present invention relates to the field of system level simulation. More particularly, the present invention relates to a method and apparatus for system level simulation through integration of a logic level simulator with an instruction level simulator.
(2) Background of the Invention
In the past, simulation of an entire system, i.e. all the components of the motherboard including the processor, has been accomplished by building hardware prototypes using wire wrapping and other bread-boarding techniques. Testing of software was conducted using such prototypes. Unfortunately, prototyping using wire wrapping and other bread-boarding techniques typically is not conducive to handling the speed and density of high performance system simulations. Given a printed circuit board as the first prototype, debugging an assembled circuit board often requires building a new board, and hence is time consuming.
An improvement in prototyping practices for system level simulation includes hardware simulation in an environment where real software is allowed to interact with the simulated hardware. In this hardware simulation environment, a mixed-level logic simulator is used to model the processor, the system and the input/output devices at the Register transfer level (RTL)/Gate Level. Unfortunately, simulation of the CPU requires increased simulation cycles. In addition, prior art described in an article from the 29th ACM/IEEE Design Automation Conference, titled "An Engineering Environment for Hardware/Software Co-Simulation" by David Becker, et al., using a logic level simulator combined with real software for simulated is a slave device. Further, direct memory access system level simulation assumes that the hardware being (DMA) is not supported by such prior art.
Simulation of system software such as device drivers and diagnostic programs is accomplished by system simulators for simulating the processor and the system. Prior art system level simulation methods have used an instruction level simulator which models a high level programmer's view of the system. An instruction level simulator runs faster than the logic level simulator but may not be able to model input/output devices accurately.
In sum, instruction level simulators are not able to model input/output devices accurately, and logic level simulators are too slow due to the overhead caused by simulation of the processor and the system. In addition, prototyping for system level simulation is a time-consuming and difficult process. Thus, there is a need for an apparatus and method for integrating an instruction level simulator with a logic level simulator which takes advantage of the accuracy of the logic level simulator as well as high performance of the instruction level simulator, thereby increasing both accuracy and speed of simulation time for system level simulation. Further, an integrated simulator decreases the need for debugging or rebuilding prototypes for system level simulation and testing and hence decreases conception to market turnaround time.